Why does cmos use less current than ttl

TTL logic uses multiple transistors having multiple emitters and multiple inputs. The types of the transistor-transistor logic are Standard transistor-transistor logic, Fast transistor-transistor logic, Schottky transistor-transistor logi c, High power transistor-transistor logic, Low power transistor-transistor logic, and Advanced Schottky transistor-transistor logic.

TTL logic gates are made up of the Bipolar junction transistors and resistors. There are many variants of TTL developed for various particular purposes like the radiation-hardened TTL packages for space applications and Low power Schottky diodes that can provide an excellent combination of speed and lesser power consumption.

The power consumption of the CMOS depends on various factors and is variable. The clock rate is one of the major factors for power consumption. Higher clock values will result in higher power consumption. When making the comparisons, a single gate in CMOS chip would consume the 10nW of power whereas an equivalent gate on the TTL chip will consume approximately 10mW power.

When the design and fabrication are considered, no doubt that the CMOS chips are very delicate and it is difficult to handle as these are highly susceptible to electrostatic discharge. A very minute amount of static electricity could cause damage to the CMOS chips. Thus people often unwillingly damage their chips only by touching the terminals of the CMOS. It consumes lesser power than the TTL and is more economical as well. The output power of the CMOS is higher and it is smaller in size as well.

If you want to allow future use of adapter boards with reasonable reliability, there are at least two options that you may wish to think of ahead of time:. Sign up to join this community. The best answers are voted up and rise to the top.

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Active 2 months ago. Viewed 4k times. What I'm wondering is what is their difference from a designer's perspective. Does it really make a difference, practically? So which logic family should I use? Care to explain? Add a comment. Active Oldest Votes. LS gives you only one option. Wouter van Ooijen Wouter van Ooijen I was under the impression this would be on regardless of the family you chose to use since filtered input is an all-around good thing.

I've used some old Cmos for the max. Spehro Pefhany Spehro Pefhany k 12 12 gold badges silver badges bronze badges. Peter Green Peter Green If you want to allow future use of adapter boards with reasonable reliability, there are at least two options that you may wish to think of ahead of time: castellated terminal adapters from a smaller device to a SO footprint, BGA adapters from a smaller CS or BGA device to a larger BGA footprint.

Kuba hasn't forgotten Monica Kuba hasn't forgotten Monica 4, 18 18 silver badges 23 23 bronze badges. Sign up or log in Sign up using Google. Write an Answer Register now or log in to answer. Upvote 1 Downvote 0 Reply 1. Answer added by B Majumder 5 years ago. Characteristics of CMOS logic: Dissipates low power: The power dissipation is dependent on the power supply voltage, frequency, output load, and input rise time. At1 MHz and pF load, the power dissipation is typically nW per gate.

Short propagation delays: Depending on the power supply, the propagation delays are usually around nS to nS. Levels of the logic signal will be essentially equal to the power supplied since the input impedance is so high. Voltage levels range from0 to Vcc where Vcc is typically4. Voltage range0V Voltage range2V - Vcc creates logic level1.

Lower current draw requires less power supply distribution, therefore causing a simpler and cheaper design.